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July 31, 2024 · Justin Kernen

IP Terminology (definitions for VLSI)

A reference guide to IP terminology in semiconductor design — hard IP, soft IP, firm IP, and what these distinctions actually mean in practice.

IP Terminology (definitions for VLSI)

There is often confusion in the industry about what exactly these terms mean, as they are often used interchangeably. The distinctions matter when you’re evaluating vendors, negotiating licenses, or scoping an integration project.

Soft IP

Soft IP is delivered as RTL — synthesizable Verilog or VHDL. The buyer can target any process node, run their own synthesis, and optimize for their specific PPA targets. The source is visible.

Advantages: portable, tunable, not locked to a specific foundry or technology. Disadvantages: the buyer does own the full implementation risk. A soft memory compiler, for instance, still requires significant work to close timing at an advanced node.

Hard IP

Hard IP is delivered as a completed GDS (or GDSII stream), tied to a specific process node and foundry. You get a black box: defined interface, characterized timing, fixed physical implementation. You cannot modify the internals.

Advantages: integration is predictable. The timing and area numbers are real — measured from silicon or from characterization that the vendor is responsible for. Disadvantages: zero portability. If you migrate nodes, you need new IP.

Standard cell libraries, IO cells, and most analog IP (PLLs, SerDes, ADCs) ship as hard IP.

Firm IP

Firm IP sits in between. Typically delivered as a synthesized netlist — post-synthesis but pre-place-and-route. The buyer still owns physical implementation but doesn’t have access to the RTL source.

This is common for processor cores from vendors who want to protect their microarchitecture IP while still allowing the buyer to control physical design. The timing is your responsibility; the logical function is the vendor’s.

Practical implications

When evaluating third-party IP, the delivery format determines your risk surface. Hard IP gives you predictable integration with zero modification latitude. Soft IP gives you flexibility but full implementation ownership. Firm IP is a middle ground that often understates the integration effort.

The license terms also differ significantly. Soft IP licenses are typically per-design or per-product; hard IP licenses are often node-specific and may require re-licensing if you change foundries. Read the contract before assuming portability.

IP VLSI TERMINOLOGY
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